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A bis-quinoline ruthenium(II) arene complex with submicromolar cytotoxicity in castration-resistant prostate cancer cells.

PMID: 38224119
Open Access Article. Published on 27 March 2019. Downloaded on 8/9/2024 5:32:55 AM. This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. RSC Advances View Article Online PAPER Cite this: RSC Adv., 2019, 9, 9678 View Journal | View Issue Field-plate engineering for high breakdown voltage b-Ga2O3 nanolayer field-effect transistors† Jinho Bae,a Hyoung Woo Kim, b In Ho Kangb and Jihyun Kim *a The narrow voltage swing of a nanoelectronic device limits its implementations in electronic circuits. Nanolayer b-Ga2O3 has a superior breakdown field of approximately 8 MV cm1, making it an ideal candidate for a nextgeneration power device nanomaterial. In this study, a field modulating plate was introduced into a b-Ga2O3 nano-field-effect transistor (nanoFET) to engineer the distribution of electric fields, wherein the off-state three-terminal breakdown voltage was reported to be 314 V. b-Ga2O3 flakes were separated from a singlecrystal bulk substrate using a mechanical exfoliation method. The layout of the field modulating plate was Received 15th February 2019 Accepted 16th March 2019 optimized through a device simulation to effectively distribute the peak electric fields. The field-plated bGa2O3 nanoFETs exhibited n-type behaviors with a high output current saturation, exhibiting excellent DOI: 10.1039/c9ra01163c switching characteristics with a threshold voltage of 3.8 V, a subthreshold swing of 101.3 mV dec1, and an on/off ratio greater than 107. The b-Ga2O3 nanoFETs with a high breakdown voltage of over 300 V rsc.li/rsc-advances could pave a way for downsizing power electronic devices, enabling the economization of power systems. Introduction b-Ga2O3 is an attractive material for high-efficiency power devices owing to its ultra-wide energy bandgap (4.85 eV at room temperature), large breakdown eld (approximately 8 MV cm1), and excellent chemical and thermal stability.1,2 Its Baliga's gure of merit is estimated to be 3214.1 times greater than that of Si, which surpasses that of conventional widebandgap materials such as GaN (846.0) and 4H-SiC (317.1), suggesting its great potential as a near-future power device material.3,4 The commercial availability of a large single-crystal b-Ga2O3 substrate at its early R&D stage makes it more competitive compared to III-nitride semiconductors, which have suffered from the absence of a commercial freestanding substrate. Many techniques of growing an epitaxial b-Ga2O3 layer have been previously reported, including metal organic chemical vapor deposition and molecular beam epitaxy (MBE), and pulsed laser deposition.5–9 Thin lm b-Ga2O3 power devices such as metal-oxide semiconductor eld-effect transistors, Schottky diodes, and metal-semiconductor eld-effect transistors (MESFETs) have demonstrated their potential as nearfuture, next-generation high-voltage electronic devices.10–15 Yang et al. fabricated edge-dened lm-fed grown (EFG) Sidoped b-Ga2O3 thin-lm vertical Schottky diodes with a Department of Chemical and Biological Engineering, Korea University, Anamdong-5-Ga, Seoul 02841, South Korea. E-mail: hyunhyun7@korea.ac.kr b Korea Electrotechnology Research Institute (KERI), Seongsan-gu, Changwon-si, Gyeongsangnam-do 51543, South Korea † Electronic supplementary information (ESI) available: DC output characteristics of the b-Ga2O3 nanoFETs with and without the eld-modulating plate and the materials parameters for the device simulations. See DOI: 10.1039/c9ra01163c 9678 | RSC Adv., 2019, 9, 9678–9683 a reverse breakdown voltage of 2300 V.16 Wong et al. demonstrated MBE-grown Si-implanted thin-lm b-Ga2O3 MOSFET with a breakdown voltage of 755 V.17 Although b-Ga2O3 is not a van der Waals material, it can be easily separated into a single-crystalline nanolayer via mechanical exfoliation owing to its large anisotropy in the monoclinic lattice constants (a [100] ¼ 12.225 Å, b [010] ¼ 3.039 Å, and c [001] ¼ 5.801 Å). Mechanically exfoliated bGa2O3 nanolayer akes feature a strain-free and at surface with a high crystallinity maintained. Hwang et al. reported a quasi-two-dimensional (quasi-2D) b-Ga2O3 layer obtained through the mechanical exfoliation of a b-Ga2O3 crystal, grown by the Czochralski method.18 Kim et al. demonstrated quasi2D b-Ga2O3 MOSFETs with a stable operation at a high temperature of 250  C, where the Ga2O3 was grown by the EFG method.19 Zhou et al. fabricated FET devices with an on/off current ratio of 1010 using Sn-doped b-Ga2O3 akes.20 The exfoliated quasi-2D b-Ga2O3 nanolayers can be easily integrated with other 2D materials such as graphene, hexagonal boron nitride (h-BN), or transition metal dichalcogenides. The formation of a heterostructure by combining diverse nanolayers is intrinsically strain-free, i.e., the high crystal quality of each layer is maintained. The integration of n-Ga2O3 with a ptype 2D material, which is absent in b-Ga2O3, can enable a versatile device conguration that facilitates p–n heterojunctions and bandgap engineering.21–23 Kim et al. fabricated a 2D material-integrated b-Ga2O3 MOSFET by stacking h-BN on top of an exfoliated b-Ga2O3 nanolayer and analyzed the single- and dual-gate operations.24 A b-Ga2O3 quasi-2D MESFET with a stepped-gate structure was demonstrated by using 2D h-BN as a dielectric layer.25 This journal is © The Royal Society of Chemistry 2019 View Article Online Open Access Article. Published on 27 March 2019. Downloaded on 8/9/2024 5:32:55 AM. This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. Paper The premature electrical breakdown induced by the concentrated electric elds limits the device operation under a high bias voltage and threatens the device reliability. Various techniques, such as a eld-modulating plate, a stepped gate, and a recess gate structure, have been introduced to ease the peak electric eld and enhance the breakdown voltage for highpower electronics.26–30 Among these, the eld-modulating plate technique has been widely used owing to its efficacy and ease of fabrication. Studies have been conducted to increase the offstate electrical breakdown voltage using a gate or source eldplate, or multiple eld-plates.31–33 However, such methods are rarely studied in nanodevices despite their potential in power nanoelectronics. The integration of a eld-modulating plate with a b-Ga2O3 nanolayer can miniaturize the power circuit system and simplify the layout. In this study, we optimized the structure of a eld-modulating plate on a b-Ga2O3 nanoFET through electric eld simulations. Based on them, we fabricated high breakdown voltage quasi-2D b-Ga2O3 nanoFETs. The structural and electrical properties of the fabricated b-Ga2O3 nanoFETs with a eld-modulating plate were systematically investigated. Experimental details A single crystalline b-Ga2O3 substrate (Tamura Corp.) with an effective carrier density of approximately 3.5  1017 cm3, grown by the EFG method, was mechanically exfoliated into quasi-2D nanolayers using a commercial adhesive tape. The exfoliated bGa2O3 nanolayer akes were transferred onto a thermally grown SiO2 (300 nm)/Si (500 mm) substrate via a standard dry transfer method. Both the source and drain electrodes were dened using an electron beam lithography (EBL) technique, followed by Ti/Au (50 nm/100 nm) metal deposition using an electron-beam evaporator. The optimal design of a eld-modulating plate, in order to distribute the localized peak electric eld of a b-Ga2O3 nanoFET device, was simulated using the device simulation soware SILVACO Atlas. Rapid thermal annealing (Mila-5050, Ulvac Technologies, Inc.) under a low-vacuum condition (<10 mTorr) was performed at 500  C for 1 min to improve the ohmic contact. The RSC Advances top-gate electrode of the b-Ga2O3 nanoFETs was deposited with Ni/ Au (50 nm/100 nm), which was dened by the EBL and electron beam evaporation procedures. A SiO2 dielectric layer with a thickness of 200 nm was deposited using plasma-enhanced chemical vapor deposition (PECVD, VL-LA-PECVD, Unaxis), followed by the patterning of the eld-modulating plate (Ti/Au (50 nm/100 nm)). The overall device fabrication process is shown in Fig. 1. The surface morphology and thickness of the fabricated eld-plated FET devices were characterized using atomic force microscopy (AFM; Innova, Bruker). Micro-Raman spectroscopy was used to analyze the structural properties of the exfoliated bGa2O3 akes under a back-scattering geometry using a 532 nm wavelength line of a diode-pumped solid-state laser (Omicron). The cross-sectional device structure and crystal orientation of the exfoliated b-Ga2O3 were investigated using scanning transmission electron microscopy (JEM-2100F, JEOL) aer the specimen was prepared using the focused ion beam (FIB) technique (Quanta 3D FEG, FEI). The surface of the specimen was protected from FIB damage by a carbon layer. The electrical properties of the eld-plated b-Ga2O3 MESFETs were monitored using an Agilent 4155C semiconductor parameter analyzer and 41501B single measurement unit expander connected to a probe station. The three-terminal off-state breakdown voltages of the fabricated b-Ga2O3 MESFETs were measured using a Keithley 6485 picoammeter connected with a Keithley 248 high-voltage supply. The fabricated b-Ga2O3 nanoFETs were immersed in a Fluorinert solution (FC-40, 3M) to prevent an unintended dielectric breakdown during the measurement of the three-terminal off-state breakdown voltage. Results and discussion Prior to the device fabrication, the optimal eld-modulating structure that can effectively distribute the concentrated electric elds was investigated in order to prevent a premature breakdown and maximize the off-state breakdown voltage of the fabricated nanoFET devices. A schematic of the simulated device structure and LFP are presented in Fig. 2a. The simulations of electric eld distribution were performed while varying Fig. 1 Fabrication process of a top-gated b-Ga2O3 nanoFET with a field-modulating plate. (a) Patterning of the source and drain ohmic contacts to the exfoliated b-Ga2O3 flake. (b) Deposition of the Ni/Au top gate electrode. (c) Deposition of the PECVD-SiO2 dielectric layer. (d) Patterning of the field-modulating plate (Ti/Au). This journal is © The Royal Society of Chemistry 2019 RSC Adv., 2019, 9, 9678–9683 | 9679 View Article Online Open Access Article. Published on 27 March 2019. Downloaded on 8/9/2024 5:32:55 AM. This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. RSC Advances Paper Fig. 2 (a) Schematic of the b-Ga2O3 nanoFET with the field-modulating plate. (b) Simulation results of the electric field distribution between the gate and drain electrodes. (c) Maximum electric fields with varying field-plate lengths (LFP). Simulation results of the electric field distribution in bGa2O3 channel (d) without and (e) with the field-modulating plate of LFP y 0.8 mm. (f) Depth profile of the electric fields calculated along the dotted line in the inset figure at varying LFP. the length of the eld-modulating plate from the edge of the gate electrode to the source-grounded eld-plate electrode (LFP). Using the numerical device analysis, the electric eld distributions, which varied with the LFP under the conditions of VDS ¼ +400 V and VGS ¼ 50 V, are shown in Fig. 2b. The electric elds at the middle of the gate and drain electrodes were less than 3 MV cm1, which is much lower than the breakdown eld of bGa2O3 (8 MV cm1). However, the electric elds were much higher at the drain edge of the gate (x ¼ 0.5 mm) and the edge of the drain electrode (x ¼ 2.5 mm). Generally, the peak electric eld was observed at the drain-side edge of the gate electrode due to the bias condition of the FET. Once defective sites are created under the intense electric elds, they will grow and damage the device. These high-intensity, highly localized electric elds can eventually destroy it.34,35 Fig. 2b indicates the redistribution of the concentrated electric elds due to the presence of the eld-modulating plate. In particular, at the drain-side edge of the gate electrode (x ¼ 0.5 mm), the electric eld was greatly alleviated by introducing the source-grounded eld-plate structure, which is consistent with the previous reports of AlGaAs/GaAs, AlGaN/GaN, and SiC devices. In AlGaAs/ GaAs HEMTs, the peak electric eld was lowered by employing the eld-modulating plate.36 Fig. 2c shows the maximum electric eld values varying with LFP and proposes that the layout optimized for the dispersion of the concentrated electric elds is LFP y 0.8 mm, which decreases the peak electric eld from 11.4 MV cm1 to 6.6 MV cm1. The peak electric eld (6.6 MV cm1) redistributed by the source-grounded eldmodulating plate was lower than the intrinsic breakdown eld (8 MV cm1) of b-Ga2O3, which can prevent a premature 9680 | RSC Adv., 2019, 9, 9678–9683 electrical breakdown during device operation and help to improve the device reliability. Fig. 2d and e compare the electric eld distribution in b-Ga2O3 channel layer without and with a eld-modulating plate, respectively. Fig. 2f shows the depth prole of the electric eld in the b-Ga2O3 channel that varies with LFP. The electric eld at the hot gate edge which is located in the drain-side gate edge was greatly mitigated by the introduction of eld-modulating plate, enhancing the off-state breakdown voltage of the FET device. Exfoliated b-Ga2O3 nanolayer MESFETs with a sourcegrounded eld-plate were fabricated based on the optimized length of the eld-modulating plate electrode (LFP ¼ 0.8 mm). The optical microscopic image (Fig. 3a) and AFM image (Fig. 3b) conrm that the b-Ga2O3 nanoFETs were fabricated using the same layout as that suggested by the above electric eld simulation. The b-Ga2O3 akes used in this study had a thickness ranging from 200 to 350 nm with a root-mean-square roughness of approximately 1.3 nm (Fig. 3b), which is consistent with the result of the cross-sectional high-resolution TEM image (Fig. 3c). PECVD SiO2 conformally covered the Ni/Au top gate electrode. On top of the PECVD SiO2 layer, the Ti/Au eld-plate electrodes were seamlessly dened with the optimized LFP (0.8 mm). A clear boundary was maintained between each layer without interdiffusion aer the device fabrication process, as in Fig. 3c, which indicates the robustness of the exfoliated b-Ga2O3 nanolayer. The Raman spectrum of the fabricated nanoFETs is shown in Fig. 4a. No change in the Raman mode was observed aer the device fabrication process, which also indicates the chemical and mechanical stability of the b-Ga2O3 nanolayer.37 The high crystallinity of the exfoliated b-Ga2O3 ake is also This journal is © The Royal Society of Chemistry 2019 View Article Online Open Access Article. Published on 27 March 2019. Downloaded on 8/9/2024 5:32:55 AM. This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. Paper RSC Advances Fig. 3 (a) Optical microscope image, (b) AFM image, and (c) cross-sectional high-resolution TEM image of the fabricated b-Ga2O3 nanoFET with the field-modulating plate. Note that a carbon layer was deposited to protect the specimen from FIB damage. Fig. 4 (a) Raman spectrum of the fabricated b-Ga2O3 nanoFET with the field-modulating plate. (b) Cross-sectional high-resolution TEM image and (c) SAED pattern of the mechanically exfoliated b-Ga2O3 flake. conrmed by the TEM image (Fig. 4b) and the selected area electron diffraction (SAED) pattern (Fig. 4c). The d-spacing in the SAED pattern was 0.609 nm, which matches the (200) lattice plane. This indicates that the mechanically exfoliated b-Ga2O3 ake was separated along the (100) direction due to the large anisotropy of the monoclinic b-Ga2O3 unit cell, even though bGa2O3 is not a van der Waals material. Eight b-Ga2O3 nanoFETs, each with a source-grounded eldplate, were fabricated. The electrical properties of the representative device are shown in Fig. 5. For comparison, the bGa2O3 nanoFET without the eld plate was characterized, where the current density of the eld-plated FETs was lower than that of the non-eld-plated FETs because the voltage on the eld plate competed with that on the gate electrode (Fig. S1†). They exhibited excellent DC output characteristics at varying VGS (Fig. 5a). The fabricated device showed n-type characteristics and was completely pinched off at a VGS of approximately 5 V. They showed a linear increase in the IDS under low-voltage operation below the knee voltage, and output currents were saturated above the knee voltage. Considering that conventional 2D material-based electronic devices suffer from the absence of output current saturation, the saturated output Fig. 5 (a) DC output and (b) transfer/transconductance characteristics of the representative b-Ga2O3 nanoFET with the field-modulating plate at varying VGS. This journal is © The Royal Society of Chemistry 2019 RSC Adv., 2019, 9, 9678–9683 | 9681 View Article Online Open Access Article. Published on 27 March 2019. Downloaded on 8/9/2024 5:32:55 AM. This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. RSC Advances Paper Fig. 6 Off-state three-terminal hard-breakdown results of the fabricated b-Ga2O3 nanoFET (a) without and (b) with the source-connected fieldmodulating plate. The insets show the schematics of each device. current in b-Ga2O3 nanoFETs show a potential for a nanoelectronic power amplier. They also exhibited reproducible electrical characteristics without a signicant change under the repeated driving conditions of VDS ¼ +50 V. By contrast, 2Dmaterial based electronic devices using graphene, black phosphorus, and transition metal dichalcogenides cannot withstand the high bias conditions used in our measurements of the fabricated b-Ga2O3 devices. Fig. 5b shows the transfer and transconductance characteristics of the fabricated b-Ga2O3 device. The eld-effect mobility (mFE) was estimated to be 3.1 cm2 V1 s1, which was calculated by the following equation: mFE ¼ gmax L qðNd  Na ÞdW where gmax is the maximum transconductance, L is the length, W is the width, d is the thickness of the b-Ga2O3 channel, respectively, q is the elementary charge, and (Nd  Na) is the effective carrier concentration of the b-Ga2O3 channel. The bGa2O3 nanoFETs showed a threshold voltage (Vth) of 3.8 V and a subthreshold swing (SS) value of 101.3 mV dec1, where the PECVD SiO2 served as both the surface passivation layer for the exfoliated b-Ga2O3 and the dielectric layer for the eldmodulating plate. Considering that the previous SS of the bGa2O3-based device was 140 mV dec1, the lower SS combined with a high on/off ratio (>107) can promise to minimize the power switching loss. The three-terminal off-state hard-breakdown voltages of the bGa2O3 nanoFETs with and without a eld-modulating plate are compared in Fig. 6a and b. The three-terminal off-state breakdown voltages were measured under the pinched-off condition. The devices under the test were immersed in Fluorinert solution to prevent unintentional dielectric breakdown due to ambient molecules, which is a standard test condition in power electronics. A high electric eld can initiate carrier multiplication through impact ionization, where the accelerated carriers collide with the lattice and release their kinetic energy. The cascade creations of electron–hole pairs will result in high off-state currents, which will catastrophically damage the device. The impact ionization coefficients of b-Ga2O3 were estimated to be 9682 | RSC Adv., 2019, 9, 9678–9683 approximately 6.1  104 cm1 and 9.5  103 cm1 at the peak electric elds of 11.4 MV cm1 (without eld-modulating plate) and 6.6 MV cm1 (with eld-modulating plate), which are much lower than those of 4H-SiC (1.7  106) and GaN (1.8  104) at electric elds of 6.6 MV cm1.38 The b-Ga2O3 shows a lower impact ionization coefficient under the same electric eld due to its high bond strength of the binding energy of Ga–O (531 eV (O1s)), much larger than that of Ga–N (397 eV (N1s)) and Si–C (283 eV (C1s)). The breakdown eld is generally proportional to (energy bandgap)2–2.5.2 This can reduce the off-state leakage currents and ensure a high hard-breakdown voltage. The hard-breakdown voltage of the eld-plated b-Ga2O3 nanoFET was 314 V (Fig. 5b), while the hard-breakdown voltage of the b-Ga2O3 nanoFET without the eld-modulating plate (Fig. 5a) was observed at VDS ¼ 145 V. The two-fold increase of the hard-breakdown voltage is attributed to the existence of the eld-modulating plate, which is consistent with the simulation results. The high off-state breakdown voltage of 314 V is much higher than those of conventional 2D devices (MoS2, 120 V) and wide-bandgap GaN nanowire device (140 V), opening a new route for next-generation high-power nanoelectronics with wide voltage swing. Conclusion A b-Ga2O3 nanoFET with an off-state hard-breakdown voltage of 314 V was fabricated by introducing a source-grounded eldmodulating plate. The numerical device simulation was employed to analyze the effects of the eld-modulating plate and determine the optimal structure to effectively distribute the electric elds concentrated on the hot gate edge. The b-Ga2O3 akes, which were mechanically exfoliated from a single-crystal bulk substrate, was used as a n-channel layer with their crystallinity maintained. The fabricated nanoFET device showed excellent device characteristics including low SS and high on/off ratio with a high off-state hard-breakdown voltage (314 V). Engineering of the peak electric elds in a nanodevice by using a eld-modulating plate improved the device stability under a high-voltage operation, paving the way for high-efficiency integrated power nanoelectronic systems. This journal is © The Royal Society of Chemistry 2019 View Article Online Paper Conflicts of interest Open Access Article. Published on 27 March 2019. Downloaded on 8/9/2024 5:32:55 AM. This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. There are no conicts to declare. Acknowledgements The research at Korea University was supported by the New & Renewable Energy Core Technology Program of Korea Institute of Energy Technology Evaluation and Planning (KETEP), which was granted nancial resources from the Ministry of Trade, Industry & Energy, Korea (No. 20172010104830) and the Technology Development Program to Solve Climate Changes of the National Research Foundation (NRF) funded by the Ministry of Science and ICT (NRF-2017M1A2A2087351). References 1 M. A. Mastro, A. Kuramata, J. Calkins, J. Kim, F. Ren and S. Pearton, ECS J. Solid State Sci. Technol., 2017, 6, P356. 2 S. Pearton, F. Ren, M. Tadjer and J. Kim, Appl. Phys. Rev., 2018, 124, 220901. 3 B. J. Baliga, IEEE Electron Device Lett., 1989, 10, 455. 4 S. Pearton, J. Yang, P. H. Cary IV, F. Ren, J. Kim, M. J. Tadjer and M. A. Mastro, Appl. Phys. Rev., 2018, 5, 011301. 5 A. Kuramata, K. Koshi, S. Watanabe, Y. Yamaoka, T. Masui and S. Yamakoshi, Jpn. J. Appl. Phys., 2016, 55, 1202A1202. 6 Y. Lv, J. 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